As an example of a semiconductor memory device in which memories of a plurality of types are integrated on one chip, OneNAND (registered trademark) is known (for example, see Jpn. Pat. Appln. KOKAI Publication No. 2006-286179). This OneNAND is formed by integrating a NAND flash memory serving as a main memory unit and an SRAM serving as a buffer unit on one chip. Furthermore, for the OneNAND, for example, a controller on which a state machine is mounted is prepared to control data transfer between the NAND flash memory and the SRAM.
In the OneNAND, during a switching operation for selected word lines in a read operation or a write operation for the SRAM, a bit line needs to be precharged and equalized to a voltage level of a VDD power supply. Control of the precharging and the equalizing is activated by a counter address which changes in response to a clock CP generated in synchronism with a clock CLK supplied from the outside. For this reason, a time required until the precharging and the equalizing are started deteriorates an operation frequency and an access time.
More specifically, in a semiconductor memory device such as a OneNAND in which a bit line needs to be precharged and equalized during a switching operation for selected word lines in a read or write operation for an SRAM, a time from when row addresses are switched to when the precharging and equalizing are activated is a factor which deteriorates an operation frequency, an access time, and internal data transfer.